Synthesizable 10-bit Stochastic TDC Using Common-Mode Time Dithering and Passive Approximate Adder with 0.012mm² Active Area in 12nm FinFET

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

Authors: Qiaochu Zhang, Shiyu Su, Baishakhi Rani Biswas, Sandeep Gupta, Mike Shuo‐Wei Chen

DOI: https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631528

Publish Year: 2024